Faster PWM DAC Using Two lower-resolution PWM Signals Added

Faster PWM DAC using parallel lower res PWM. 

Create two PWM outputs, and analog scale & sum to get result 20x faster than with a longer PWM clock interval. 

Divide by 4 to go from 8 bits to 6 bits.

Two scale to two 3-bit numbers, 

lower: & 111,  higher: >>3 & 111

The Circuit 

Reference from EDN Design Ideas by Stephen Woodward

   https://www.edn.com/a-faster-pwm-based-dac/     PDF

How to do the math algebraically to down-scale:  

Divide and truncate, find remainder

The formulas